Risc-v is a topic tracked in our intelligence system with 5 linked articles.
Ikerlan’s BEGI neuromorphic insect-eye sensor aims for ultra-low-latency, low-power 4D sensing with a 0.9MP prototype, a roadmap to full-frame ASICs, and potential markets in industrial, aerospace, and robotics, anchored by ecosystem standards like open RISC‑V in space.
VideoLAN announces dav2d, a BSD-licensed open-source AV2 decoder aimed at production use, with AV2 offering ~25% gains over AV1 but ~5x decoding complexity, and current progress toward a feature-complete, multi-arch implementation.
Open-source semiconductor design can be monetized via services and tooling (e.g., IP Forge) rather than licensing IP, with cheap experimentation (~$4–$7k wafer runs) and potential demand from security-focused and custom-chip buyers.
A historical tech write-up on PipeDream, Archimedes/ARM origins, and the broader rise of ARM licensing and RISC-V, weighing the allure and limits of an all-in-one productivity suite against modular apps and open-source continuity.
A 25% performance regression in LLVM's RISC-V backend is highlighted, with discussion linked to a Hacker News thread.
Nvidia-backed SiFive hits a $3.65 billion valuation for open AI chips based on RISC-V architecture.
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